Matrix Multiplication Parallelization on a Many-Core Platform

نویسنده

  • Pollawat Thanarungroj
چکیده

This paper introduces an approach to analyze the power and energy consumption of a many-core system. The investigation has been done by using the Intel SCC system as an experimental platform. The approach is to collect the time and power profiling of an executing application on the Intel SCC system. And then, we find the total energy consumed for the entire execution. We studied the effects of power and energy consumption in many-core systems by varying different hardware configuration parameters such as number of cores, clock frequency and voltage level. Thus, the many-core system can be explored for its scalability, fitness in operational cost and performance.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Efficient parallelization of the genetic algorithm solution of traveling salesman problem on multi-core and many-core systems

Efficient parallelization of genetic algorithms (GAs) on state-of-the-art multi-threading or many-threading platforms is a challenge due to the difficulty of schedulation of hardware resources regarding the concurrency of threads. In this paper, for resolving the problem, a novel method is proposed, which parallelizes the GA by designing three concurrent kernels, each of which running some depe...

متن کامل

Sparse-matrix vector multiplication on hybrid CPU+GPU platform

Sparse-matrix vector multiplication(Spmv) is a basic operation in many linear algebra kernels.So it is interesting to have a spmv on modern architectures like GPU. As it is a irregular computation CPU also performs compares to GPU. So it is interesting to have this routine in hybrid architectures like CPU+GPU.So we have designed a hybrid algorithm for Spmv which uses a CPU and a GPU. We have ex...

متن کامل

Parallelizing Programs for the Multicore Era

Modern processors are very advanced but still suffer the bottleneck of slow memory access speeds. Processors now have the ability to run multiple tasks in parallel. This means that the processor runs multiple tasks concurrently, rather than sequentially, thus reducing the effect of memory access times. Utilizing this ability is called parallelization. There are many standards in place that allo...

متن کامل

Algorithmic patterns for H-matrices on many-core processors

In this work, we consider the reformulation of hierarchical (H) matrix algorithms for many-core processors with a model implementation on graphics processing units (GPUs). H matrices approximate specific dense matrices, e.g., from discretized integral equations or kernel ridge regression, leading to log-linear time complexity in dense matrix-vector products. The parallelization of H matrix oper...

متن کامل

A Solution for Automatic Parallelization of Sequential Assembly Code

Since modern multicore processors can execute existing sequential programs only on a single core, there is a strong need for automatic parallelization of program code. Relying on existing algorithms, this paper describes one new software solution tool for parallelization of sequential assembly code. The main goal of this paper is to develop the parallelizator which reads sequential assembler co...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2011